It is known that it is often desirable to shift the voltage value of a digital signal to a high voltage value, maintaining the same phase. Circuit solutions which perform this task are known for this purpose.
Conventional circuits are generally capable of effectively providing the intended shift, obtaining a circuit output voltage which closely follows the input voltage, i.e., has very short rise and delay times over a wide input voltage range. Moreover, conventional circuits are implemented so as to minimize the consumption of silicon area, in the case of monolithic implementations, or the number of components, in the case of discrete implementations.
Another characteristic of a shift circuit is that current flows through the circuit, and therefore, power is absorbed. It is better to have a flow of current only during level transition steps.
Conventional circuits thus meet these requirements but entail a drawback which limits their use to certain voltage ranges.
This drawback is shown with reference to the circuit of FIG. 1, illustrating a conventional circuit solution for a level shift circuit. The circuit of FIG. 1 comprises two P-channel MOS transistors 1 and 2 which are connected to a high voltage branch, designated by Vh, by means of their respective source terminals, and to the drain terminals of a second pair of N-channel MOS transistors 3 and 4 by means of their drain terminals. The source terminals of the second pair of transistors are connected to a ground voltage branch. An input voltage Vin and its complementary voltage, inverted by means of an inverter 5, are respectively applied to the gate terminals of the transistors 3 and 4.
The gate terminals of the P-channel MOS transistors 1 and 2 are respectively connected to the branches for connection between the drain terminals of the transistors 2 and 4 and between the drain terminals of the transistors 1 and 3. The output of the circuit is of the differential type and is designated by Vu1 and Vu2.
The above circuit, although meeting the above requirements, is affected by the drawback that if the high voltage branch Vh is placed at a voltage level higher than the maximum operating voltage of the gate oxide of the MOS transistors 1 and 2, said transistors can break down.
This problem worsens as the progress of technology leads to use of transistors with increasingly thinner gate oxide. The continuing reduction in oxide thickness on the one hand entails a parallel reduction of the threshold voltage Vt of the transistors and an increase in the intrinsic breakdown of the drain and source terminals, but on the other hand, determines a lower maximum operating gate-source voltage (Vgs). Accordingly, transistors produced with modem technologies are not capable of withstanding high voltages and are in any case limited by the value of their gate-source voltage.